diff --git a/inc/cache.h b/inc/cache.h
index a16324a..4f52b62 100644
--- a/inc/cache.h
+++ b/inc/cache.h
@@ -2,6 +2,7 @@
 #define CACHE_H
 
 #include "memory_class.h"
+#include <fstream>
 
 // PAGE
 extern uint32_t PAGE_TABLE_LATENCY, SWAP_LATENCY;
@@ -112,6 +113,7 @@ class CACHE : public MEMORY {
              roi_miss[NUM_CPUS][NUM_TYPES];
 
     uint64_t total_miss_latency;
+    std::ofstream llc_access_trace;
     
     // constructor
     CACHE(string v1, uint32_t v2, int v3, uint32_t v4, uint32_t v5, uint32_t v6, uint32_t v7, uint32_t v8) 
diff --git a/replacement/create_llc_trace.llc_repl b/replacement/create_llc_trace.llc_repl
new file mode 100644
index 0000000..a9ae628
--- /dev/null
+++ b/replacement/create_llc_trace.llc_repl
@@ -0,0 +1,31 @@
+// LRU cache replacement policy that logs all LLC cache accesses.
+#include "cache.h"
+
+// initialize replacement state
+void CACHE::llc_initialize_replacement()
+{
+  llc_access_trace.open("llc_access_trace.csv");
+}
+
+// find replacement victim
+uint32_t CACHE::llc_find_victim(uint32_t cpu, uint64_t instr_id, uint32_t set, const BLOCK *current_set, uint64_t ip, uint64_t full_addr, uint32_t type)
+{
+    return lru_victim(cpu, instr_id, set, current_set, ip, full_addr, type);
+}
+
+// called on every cache hit and cache fill
+void CACHE::llc_update_replacement_state(uint32_t cpu, uint32_t set, uint32_t way, uint64_t full_addr, uint64_t ip, uint64_t victim_addr, uint32_t type, uint8_t hit)
+{
+    // baseline LRU
+    if (hit && (type == WRITEBACK)) // writeback hit does not update LRU state
+        return;
+
+    // Log PC, address pairs to create the trace
+    llc_access_trace << hex << ip << "," << full_addr << endl;
+    return lru_update(set, way);
+}
+
+void CACHE::llc_replacement_final_stats()
+{
+
+}
diff --git a/run_champsim.sh b/run_champsim.sh
index 13a69ff..c0a6fec 100755
--- a/run_champsim.sh
+++ b/run_champsim.sh
@@ -6,7 +6,7 @@ if [ "$#" -lt 4 ]; then
     exit 1
 fi
 
-TRACE_DIR=$PWD/dpc3_traces
+TRACE_DIR=$PWD
 BINARY=${1}
 N_WARM=${2}
 N_SIM=${3}
diff --git a/src/ooo_cpu.cc b/src/ooo_cpu.cc
index 5021734..be63f00 100644
--- a/src/ooo_cpu.cc
+++ b/src/ooo_cpu.cc
@@ -30,14 +30,10 @@ void O3_CPU::read_from_trace()
             if (!fread(&current_cloudsuite_instr, instr_size, 1, trace_file)) {
                 // reached end of file for this trace
                 cout << "*** Reached end of trace for Core: " << cpu << " Repeating trace: " << trace_string << endl; 
-
-                // close the trace file and re-open it
                 pclose(trace_file);
-                trace_file = popen(gunzip_command, "r");
-                if (trace_file == NULL) {
-                    cerr << endl << "*** CANNOT REOPEN TRACE FILE: " << trace_string << " ***" << endl;
-                    assert(0);
-                }
+
+                // Don't repeat the trace, otherwise train / test may overlap.
+                return;
             } else { // successfully read the trace
 
                 // copy the instruction into the performance model's instruction format
@@ -147,14 +143,10 @@ void O3_CPU::read_from_trace()
 	      {
                 // reached end of file for this trace
                 cout << "*** Reached end of trace for Core: " << cpu << " Repeating trace: " << trace_string << endl; 
-		
-                // close the trace file and re-open it
                 pclose(trace_file);
-                trace_file = popen(gunzip_command, "r");
-                if (trace_file == NULL) {
-		  cerr << endl << "*** CANNOT REOPEN TRACE FILE: " << trace_string << " ***" << endl;
-                    assert(0);
-                }
+
+                // Don't repeat the trace, otherwise train / test may overlap.
+                return;
             }
 	    else
 	      { // successfully read the trace
